Faster Static Timing Analysis via Bus Compression
نویسندگان
چکیده
Static timing analysis is used extensively in the design of high-performance processors. In this paper we present a method which transforms the circuit graph used by timing analysis algorithms to a smaller one, and hence results in faster timing analysis. This transformation, called bus compression, may lead to a more conservative analysis. However, experiments on several large designs yielded the same results with or without bus compression. CSE-TR-285-96: FASTER STATIC TIMING ANALYSIS VIA BUS COMPRESSION 1
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تاریخ انتشار 1996